Arm: Side-channel attack on Cortex-M not indicative of architectural flaws

Side-channel attack on Cortex-M based systems not indicative of architectural flaws, Arm says

Image:
Side-channel attack on Cortex-M based systems not indicative of architectural flaws, Arm says

Researchers managed to attack MCUs commonly used in IoT devices, but this would work with any code with secret-dependent control flow, chip designer says

Chip designer Arm has said that a successful side-channel attack on its TrustZone-enabled Cortex-M based systems cannot be considered a failure of the protection provided by the architecture.

Following a presentation at the recent Black Hat Asia infosec conference, Arm released the statement in response to allegations that their microcontrollers are vulnerable to side-channel attacks.

During their presentation titled Hand me your secret, MCU! Microarchitectural timing attacks on microcontrollers are practical, researchers from Portugal's Universidade do Minho (UdM) showcased the first functional micro-architectural timing side-channel attack on TrustZone-enabled Cortex-M based systems.

Contrary to the findings presented by the researchers, Arm contended that the micro-architectural timing side-channel attack does not signify a failure in the protective measures provided by the architecture.

"TrustZone technology for Armv8-M processors or the Security Extension in the Armv8-M architecture is designed to provide hardware enforced isolation between software environments. This arrangement protects against most software attacks and covers the security needs for many applications," Arm said.

A side-channel attack is a type of security exploit that focuses on gathering information or influencing the execution of a system using indirect effects or characteristics of the system or its hardware, rather than directly targeting the programme or its code.

These attacks often involve measuring coincidental hardware emissions to extract sensitive information, such as cryptographic keys.

While side-channel attacks were historically challenging to carry out, their prevalence has increased due to a number of factors.

Advances in measuring equipment has significantly enhanced its sensitivity, allowing for the collection of highly detailed data about a system during its operation.

Moreover, the increased computing power and the application of machine learning techniques empower attackers to gain a better understanding of the extracted raw data.

This deeper comprehension of targeted systems enables attackers to effectively exploit subtle variations within a system.

Microcontrollers (MCUs), such as Arm's Cortex-M, were previously considered unlikely targets due to their simplicity.

But following the successful side-channel attack against Cortex-M, researchers are now warning that such attacks could have far-reaching consequences, since MCUs are extensively used in almost every IoT device.

"We can basically break all security isolation guarantees in Arm MCUs, including the state-of-art ones with the TEE TrustZone-M technology," Pinto said.

According to Arm, the security extensions implemented in the Armv8-M architecture do not explicitly assert protection against side-channel attacks arising from control flow or memory access patterns.

"Indeed, such attacks are not specific to the Armv8-M architecture; they may apply to any code with secret-dependent control flow or memory access patterns. This type of attack can be mitigated by ensuring that the control flow and memory accesses patterns created by the program do not depend on secret state. This is already a common feature in security critical code like cryptography libraries," it added.

Arm has affirmed its commitment to enhancing security measures and facilitating the creation of more secure solutions within its ecosystem.

The firm highlighted the introduction of the "Data Independent Timing" feature in the Armv8.1-M architecture as an example of their efforts to mitigate data dependent timing side-channel attacks.

This feature aims to provide protection against such attacks by eliminating timing variations that could be exploited.