AMD lays out roadmap with system on a chip strategy

AMD Fusion APUs to feature a modular SoC design for flexibility and time to market

AMD is shifting strategy to focus on bringing products to market faster in future, as it plans to deliver its first APU designed for tablet devices and hopes to build developer support for its Fusion architecture.

At its annual Financial Analyst Day event, AMD outlined its future roadmaps for 2012 and 2013, which will see new APU products across the board for mobile platforms including tablets, plus new four-to-eight core FX chips for desktop systems.

AMD chief executive Rory Read said the company's strategy will be to capitalise on the convergence of technologies and devices, plus trends such as consumerisation of technology.

"Our new strategy will help AMD embrace the shifts occurring in the industry, marrying market needs with innovative technologies," he said.

Starting in 2013, AMD said it will move its APUs to a system on a chip (SoC) design, incorporating the Fusion Controller Hub (chipset) functions as well as the CPU and GPU on a single chip.

This approach will speed time-to-market, according to AMD, and enable the development of more tailored customer solutions, with the SoC strategy allowing the company to adopt a modular approach to processor design that can re-use functional blocks.

The first APU chips based on this new SoC approach will be codenamed Kabini and Temash, and will also debut a new CPU core called 'Jaguar', which is the follow-on to the 'Bobcat' core design.

2013 will also see the first teraflop APU, AMD said. Codenamed Kaveri, this will be based on another new CPU core called 'Steamroller', which succeeds 'Piledriver', itself an update of the Bulldozer core.

As far as 2012 goes, AMD will introduce its first APU aimed at Windows tablets, in the shape of the Z-Series 'Hondo' processor, based on one or two Bobcat CPU cores and boasting a low-power operation of just 4.5W, the firm said.

AMD lays out roadmap with system on a chip strategy

AMD Fusion APUs to feature a modular SoC design for flexibility and time to market

For laptops, the A-Series APUs codenamed Trinity are slated for mid-2012 and will have two to four of the firm's next-generation Piledriver CPU cores, enhanced graphics and double the performance-per-watt of the 2011 A-Series chips, according to AMD.

Lower down the stack, new C-Series and E-Series APUs codenamed Brazos 2.0 will update the existing line aimed at netbooks and smaller form factors.

Meanwhile, the high-end chip for desktop is codenamed Vishera. Due in the second half of 2012, this will have up to eight Piledriver cores and replaces the current FX line.

AMD's server roadmap also gets a refresh for 2012 to 2013, with new chips that swap the Bulldozer cores for the Piledriver design.

Core counts will remain the same, according to AMD, but overall performance will take a jump owing to performance and clock frequency improvements in Piledriver.

At the top-end, the Abu Dhabi chips will have four to 16 cores and target the larger two and four-socket systems. For one and two-socket servers, the Seoul chips will have six to eight cores, and will simply drop into systems with the existing C32 socket design, AMD said.

For single-socket web server and micro server systems, Delhi chips come in four up to six core versions, just like the existing Opteron 3000 series.

Meanwhile, AMD talked up its Fusion System Architecture (FSA), now renamed as Heterogeneous Systems Architecture (HSA). This utilises development frameworks such as OpenCL to provide a unified programming model for both CPU and GPU architectures, such as AMD's own Fusion APUs.

FSA was first disclosed at the firm's inaugural Fusion Developer Summit last year, and more details are expected to be reveled at this year's event, set for June 11 to 14.