The outer limits? What will happen when microprocessors reach 'silicon plateau'?

As copper and silicon-based CPUs reach their physical limits, what is in the pipeline that will keep compute power growing? Nic Fearn investigates

In recent years, the semiconductor industry has made great efforts in shrinking the size of circuits to pack more power into electronics. But at the 5nm mark, it's becoming increasingly difficult to develop microprocessors with even smaller transistors

Technologists are finding it near impossible to shrink copper much further, while reliably carrying an electrical circuit. As manufacturers are expected to begin producing mainstream microprocessors using 5nm and even 3nm lithography any time between 2020 and 2022, what happens next?

Engineers are responding by re-architecting the way chips access and process information in order to save power and use it instead for processing the data

If semiconductor firms struggle to continue reducing the size of their processors, how can they wring out more performance from future products in order to justify premium prices? And are there any radical technologies that could revolutionise semiconductors and compute power every bit as thoroughly as the invention of the transistor?

A new era of processing

As electronics continues to evolve and become more powerful, the processing techniques that super-charged CPUs in the past are quickly turning into a barrier. Steven Woo, fellow and distinguished inventor at semiconductor company Rambus, says that the industry is adopting a new approach to combat the loss of its historically most important tools.

"For years, the computing industry has relied on two process manufacturing mainstays - Moore's law and ‘Dennard scaling' - to fuel improvements in each new generation of processor," he says.

"The former has given us more transistors with each new process technology, while the latter has helped dramatically reduce the power consumed by each transistor. Dennard scaling all but ended more than a decade ago, and Moore's law is slowing."

If you get out of the CMOS bubble, then we have an abundance of tech and possibilities that will take us down to single transistor atom

Woo says that accessing and moving data are the two largest consumers of chip and system power, increasing pressure on manufacturers to come up with more powerful alternatives.

"Engineers are responding by re-architecting the way chips access and process information in order to save power and use it instead for processing the data. The power that is saved can in turn be used for more processing cores, or for running available processing cores at higher speeds."

But there are plenty of other methods. "Domain-specific architectures are also being developed that are optimised for the specific needs of different markets, allowing power to be used in the most effective way possible for different applications," continues Woo.

"Chip stacking is another area being explored, and has the potential to reduce power by placing chips in closer proximity so that less power is spent moving data and communicating between chips. New materials are also being studied that can potentially augment silicon in a manner that can extend technology roadmaps further into the future."

But Peter Cochrane, the former chief technology officer at BT, now chairman of Cochrane Associates and professor of sentient systems at the University of Suffolk, urges companies not to give up on Moore's law. "It is far from dead, and 2.5nm is now slated for production. If you get out of the CMOS bubble, then we have an abundance of tech and possibilities that will take us down to single transistor atom."

Transforming electronics

Over the years, semiconductor firms have shown they've been able to shrink the lithographic feature sizes of processors. Andrew Rogoyski, innovation director at analyst firm Roke Manor Research, expects microprocessors to keep evolving but points out that the development of 5mn and 3nm processors will require some kind of accommodation with the laws of physics.

The physics start to change when you start to think about going beyond the extreme ultraviolet lithography techniques being created to deliver 5nm and even 3nm features

"The physics start to change when you start to think about going beyond the extreme ultraviolet lithography techniques being created to deliver 5nm and even 3nm features. Beyond extreme ultraviolet, you enter the regime of soft x-rays where light sources are different and where grazing incidence or diffraction optics like Fresnel zone plates are needed," he says.

"The architecture of processors will continue to change - this is already happening. Most commonplace processors now consist of multiple cores, so performance gains can be delivered by spreading your processing over the cores.

"But beyond a few cores, operating systems and applications need to be properly re-architected to take advantage of massive parallelism and some applications don't lend themselves to this. In some areas we'll continue to get performance gains, in other areas, we'll run into new limits".

The outer limits? What will happen when microprocessors reach 'silicon plateau'?

As copper and silicon-based CPUs reach their physical limits, what is in the pipeline that will keep compute power growing? Nic Fearn investigates

Rogoyski believes the industry will shift its focus to entirely new chip architectures, such as neuromorphic processors. He explains: "These provide native hardware that are optimised for deep-learning algorithms based on bio-inspired neural networks. These will deliver massive performance improvements for certain classes of processing problem, like image analysis and speech recognition."

The rise of quantum computing, according to Rogoyski, will also result in a new computing paradigm. He adds: "Early work is delivering quantum annealing processors, which are designed to solve optimisation problems (for example, the most efficient way for a logistics company to send out its parcels) much more efficiently than conventional processors.

For years, the computing industry has relied on two process manufacturing mainstays - Moore's Law and ‘Dennard scaling' - to fuel improvements in each new generation of processor

"However, these don't deliver the full promise of quantum computing, which leverages the strange world of quantum mechanics and the complexities of superposition to deliver an exponential increase in compute power. Such devices are still in the laboratory and some years away from commercial use. When such devices do start to emerge, one of the new challenges will be the way you programme quantum computers to solve specific problems."

Increasing power

When it comes to purchasing a new electronic device, one of the main things people expect is increased power. By creating smaller microprocessors, manufacturers have been able to do this. Paul Neil, vice president of product management at fabless semiconductor company XMOS, says: "The introduction of new computing architectures, both in the cloud and at the edge, goes some way towards improving performance capabilities.

"We see this on the server side with the introduction of dedicated neural network devices for both training and inference. At the edge, we see the introduction of acceleration for inference (for instance, machine learning), targeted at specific high volume consumer applications, as the winning strategy to wring out more performance," he says.

Chris Aldham, of electrical thermal insulation specialists 6SigmaET, agrees that shrinking feature size has enabled microprocessors to become smaller and more powerful. But he says that if they cannot shrink any further, increased performance is likely to come from parallelisation utilising multiple cores instead.

He tells Computing: "This is likely to lead to more exotic packaging using 3D chip stacking, for example. 3D packaging, of course, brings a lot of issues that have to be considered and especially important to us at 6SigmaET are the thermal challenges that it brings. Getting the heat out from the die(s) is something that will have to be considered very early in the design."

That, though, is a challenge that chip designers will no doubt face in the near future as they are tasked with wringing out more performance with every generation of CPU technology

As technology has quickly advanced over the decades, semiconductor companies have been able to shrink the size of circuits to enable more powerful electronics. But it's clear that this is becoming more difficult, and they're having to find more radical ways to transform the microprocessor.