Devices get ARM muscle

20 May 2004

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Chip designer ARM last week announced new technologies that will boost the performance and capabilities of ARM-based processors, which are found in devices ranging from handheld computers and smartphones to network appliances and consumer set-top boxes.

At the Embedded Processor Forum in San Jose, ARM unveiled plans to let licensees put up to four ARM cores on a single chip. The firm also announced technology to add high-speed signal processing functions to ARM-based chip designs. This will speed handling of multimedia and communications.

Further reading

ARM's MPCore system allows chip configurations with up to four processors. It supports symmetric multiprocessing (SMP) - where all processors share the workload - or asymmetric multiprocessing - where individual processors are dedicated to specific functions. The MPCore technology, developed in partnership with NEC Electronics, is ideal for demanding apps where multiple tasks must be executed simultaneously.

"Multiprocessing can give system designers very high processing performance combined with low power consumption. Through our partnership with NEC Electronics we have developed the groundbreaking MPCore multiprocessor, which delivers the benefits of scalable multiprocessing in a configurable and easy-to-use implementation," said ARM's head of technology, Mike Muller.

The MPCore design is available to chip firms now, but will not appear in production silicon until next year. An evaluation system running the Linux 2.6 kernel is also available, as is ARM's Optimode technology, which lets chipmakers add to their ARM-compatible chips a "data engine" for numeric-intensive processing. The engine can be configured by the app and is for tasks requiring a digital signal processor (DSP), like a radio signal decoder in mobile phones.

"The processing needs of some apps are outstripping the capabilities of the general-purpose DSP," said Muller. "This is forcing a shift to dedicated logic, [but] Optimode data engines provide the performance levels of hard-wired dedicated logic with the flexibility [of] a programmable approach."

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